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Renesas Electronics /R7FA6M3AH /EPTPC /STCHSELR

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Interpret as STCHSELR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)SYSEL

SYSEL=0

Description

Time Synchronization Channel Select Register

Fields

SYSEL

Timer Information Input SelectNOTE: Do not change the value of this bit while the SYNSTARTR.STR bit is 1.

0 (0): Time information from synchronization from the SYNFP0 module is used.

1 (1): Time information from synchronization from the SYNFP1 module is used.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data